Modem Code for V.22bis

Software Overview

ILLICO is offering Digital Signal Processing software for implementing the CCITT data modem standard V.22bis. This software modem can replace conventional data modem chip sets in applications where a general purpose TMS320C5x/C54x/C3x/C4x DSP is available on a dedicated or shared basis. Digital sample interpolation permits direct "all digital" interface with 64 Kb/s PCM data streams and avoids conversion to an analog signal. For analog environments, a simple Mu or A-law codec can provide the analog interface in many applications. Page oriented internal RAM addressing allows easy implementation of multiple independent modems in one processor. All available code was created by ILLICO's staff and can be customized to support special interfaces and special signal processing requirements. The target applications for these software modems are data relay in FAX relay systems, embedded communications, and network control. Application layer features such as dialing, error correction protocols, compression, and Hayes-type control interface are not included.

Features and Benefits

  • CCITT V.22bis (2400 bps and 1200 bps).
  • Bell 212A 1200 bps.
  • Synchronous or Stop/Start (V.14) data format.
  • Modem code callable with C-language or assembly language conventions.
  • Receiver interpolation to support fixed sampling rates.
  • Transmit speed tracking by sample interpolation (option for data relay).
  • Answer tone and guard tone classification (option for data relay).
  • Zero overhead context switching for multiple modems in one processor.
  • Block oriented I/O to facilitate processor sharing with other applications.
  • Diagnostic mean-square-error calculation and eye pattern support.
  • Forty page Interface Specification to aid installation and application creation.
  • V.21 and BELL 103 available in C-Language or T.I. assembly versions.

Processor and System Requirements

The following values represent the nominal resource usage for the TMS320C5x and TMs320C54x processors. The ranges of MIP performance depend on the level of internal RAM usage.

- Data Ram per full duplex channel: 384 words internal (3 pages of data variables)

- Program memory: 6 K total.

- Per channel MIPs loading (Million Instructions Per Second, zero wait state): 7.5 MIPs

 

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